LongliveSSD: Maximizing Lifetime Minimizing Tail-Latency for Multi-Mode SSDs
Ren, Tianyu Li, Qiao Lv, Yina Ye, Min Guan, Nan Xue, Chun Jason
Ren, Tianyu
Li, Qiao
Lv, Yina
Ye, Min
Guan, Nan
Xue, Chun Jason
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Computer Science
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Conference proceeding
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Abstract
Driven by escalating big data storage demands and cost-reduction imperatives, NAND flash technology has evolved from single-level cell (SLC) to quad-level cell (QLC). However, QLC NAND flash memory's endurance limitations and suboptimal performance have hindered its enterprise adoption. This paper proposes LongliveSSD to increase the total writable volumes of QLC-based solid-state drives (SSDs). LongliveSSD switches the program mode of blocks level by level (SLC→MLC→TLC→QLC), based on the runtime capac-ity demands. Therefore, each block may experience multiple programming modes throughout its lifetime, dynamically redis-tributing QLC-induced wear to more durable low-density modes for enhanced endurance. Furthermore, we address the long-tail latency challenge of bulk writes for LongliveSSD, through dynamically optimizing programming mode selection based on the request queue patterns. Experimental results demonstrate 2.5× and 1.4x higher improvements in total write volume compared to QLC SSDs and the existing SLC-QLC hybrid SSDs, respectively. Additionally, the performance is improved by 38.3 % and 8.6 %, respectively.
Citation
T. Ren, Q. Li, Y. Lv, M. Ye, N. Guan, C.J. Xue, "LongliveSSD: Maximizing Lifetime Minimizing Tail-Latency for Multi-Mode SSDs," 2026, pp. 30-35.
Source
2025 IEEE 14th Non-Volatile Memory Systems and Applications Symposium (NVMSA)
Conference
IEEE 14th Non-Volatile Memory Systems and Applications Symposium (NVMSA)
Keywords
40 Engineering, 4009 Electronics, Sensors and Digital Hardware, 46 Information and Computing Sciences
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IEEE 14th Non-Volatile Memory Systems and Applications Symposium (NVMSA)
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IEEE